Continuing advancements in solid-state lighting technologies, and specifically light-emitting diodes (LEDs), continue to result in remarkable performance improvements when compared to their incandescent and fluorescent counterparts. Generally, LED-based lighting fixtures are more efficient, last longer, are more environmentally friendly, and require less maintenance than incandescent and fluorescent lighting fixtures. Accordingly, LEDs are poised to replace conventional lighting technologies in applications such as traffic lights, automobiles, general-purpose lighting, and liquid-crystal-display (LCD) backlighting.
LED lighting fixtures may be driven by a linear (i.e., direct current) driver signal or a pulse-width modulated (PWM) driver signal. Since most lighting fixtures receive power from an alternating current (AC) power source, power conversion must be performed in order to produce the linear driver signal or PWM driver signal for driving the LED lighting fixture. While the color of light emitted from an LED primarily depends on the composition of the material used to fabricate the LED, the light output of an LED is directly related to the current flowing through the P-N junction of the LED. Accordingly, driver circuitry capable of providing a constant current is desirable for an LED lighting fixture.
FIG. 1 shows conventional driver circuitry 10 for an LED lighting fixture. For context, an AC power source 12 and an LED light source 14 are also shown. The conventional driver circuitry 10 includes power converter circuitry 16 and switching control circuitry 18 coupled to the power converter circuitry 16. The power converter circuitry 16 includes a bridge rectifier 20, a power converter switching element Q_PC, a power converter transformer T_PC, a power converter diode D_PC, and a power converter output capacitor C_PC. The bridge rectifier 20 includes a first rectifier diode D_R1 with a cathode coupled to a first rectifier output node 22 and an anode coupled to a positive output of the AC power source 12, a second rectifier diode D_R2 with a cathode coupled to the first rectifier output node 22 and an anode coupled to a negative output of the AC power source 12, a third rectifier diode D_R3 with a cathode coupled to the positive output of the AC power source 12 and an anode coupled to a second rectifier output node 24, and a fourth rectifier diode D_R4 with a cathode coupled to the negative output of the AC power source 12 and an anode coupled to the second rectifier output node 24. The power converter transformer T_PC includes a primary winding 26 coupled in series with the power converter switching element Q_PC between the first rectifier output node 22 and the second rectifier output node 24. Further, the power converter transformer T_PC includes a secondary winding 28 coupled in parallel with the power converter output capacitor C_PC and the LED light source 14 and an auxiliary winding 30 coupled between the second rectifier output node 24 and the switching control circuitry 18. The power converter diode D_PC is coupled between the secondary winding 28 of the power converter transformer T_PC and the power converter output capacitor C_PC. The switching control circuitry 18 is further coupled to the power converter switching element Q_PC.
The second rectifier output node 24 is typically used as a ground for the switching control circuitry 18. The power converter switching element Q_PS may be a metal-oxide-semiconductor field-effect transistor (MOSFET). Accordingly, a drain contact (D) of the power converter switching element Q_PS may be coupled to the primary winding 26 of the power converter transformer T_PC, a source contact (S) of the power converter switching element Q_PS may be coupled to the second rectifier output node 24, and a gate contact (G) of the power converter switching element Q_PS may be coupled to the switching control circuitry 18.
In operation, an AC power supply signal AC_PS is received and rectified by the bridge rectifier 20 to provide a rectified input signal R_IS to the primary winding 26 of the power converter transformer T_PC. The power converter switching element Q_PC receives a switching control signal SW_C from the switching control circuitry 18, which modulates the state of the power converter switching element Q_PC. When the power converter switching element Q_PC is in an ON state, the rectified input signal R_IS flows through the primary winding 26 of the power converter transformer T_PC, resulting in a storage of energy in the primary winding 26 via a build-up of magnetic flux. A voltage induced in the secondary winding 28 is negative, such that the power converter diode D_PC is reverse biased and the power converter output capacitor C_PC supplies power to the LED light source 14. When the power converter switching element Q_PC is in an OFF state, the magnetic field of the primary winding 26 begins to collapse, such that the primary winding 26 induces a positive voltage in the secondary winding 28, thereby forward biasing the power converter diode D_PC and providing power to the power converter output capacitor C_PC and the LED light source 14. The auxiliary winding 30 receives a similar signal to the secondary winding 28, and thus is used to indirectly measure the characteristics of the primary winding 26 and/or the secondary winding 28. Energy from the secondary winding 28 is placed across the power converter output capacitor C_PC where it is smoothed and delivered to the LED light source 14 as a regulated driver output signal R_OUT. A voltage signal from the auxiliary winding 30 is delivered to the switching control circuitry 18 as a switching indicator signal SW_I, which is used by the switching control circuitry 18 to modulate the switching control signal SW_C.
The switching control circuitry 18 may modulate the switching control signal SW_C in many different ways. In a first mode of operation, the switching control circuitry 18 may provide the switching control signal SW_C such that the energy stored in the power converter transformer T_PC never falls to zero. In this case, the conventional driver circuitry 10 is said to operate in a continuous conduction mode (CCM). In a second mode of operation, the switching control circuitry 18 may provide the switching control signal SW_C such that the energy stored in the power converter transformer T_PC falls to zero and remains at zero for some period of time (i.e., “dead time”) before ramping back up. Specifically, neither the primary winding 26 nor the secondary winding 28 is conducting during the dead time of the power converter transformer T_PC. In this case, the conventional driver circuitry 10 is said to operate in a discontinuous conduction mode (DCM). In a third mode of operation, the switching control circuitry 18 may provide the switching control signal SW_C such that the energy stored in the power converter transformer T_PC immediately begins to ramp up after falling to zero. Specifically, the primary winding 26 of the power converter transformer T_PC begins to conduct current immediately after the current through the secondary winding 28 decreases to zero. In this case, the conventional driver circuitry 10 is said to operate in a critical or boundary conduction mode (BCM).
Operation in a discontinuous conduction mode (DCM) is preferred in many situations, especially for medium to low power applications. Because the power converter switching element Q_PC is turned on only when the power converter diode D_PC is not conducting current, the power loss due to the reverse recovery effect of the power converter diode D_PC can be eliminated, which may lead to significant efficiency improvements for high voltage applications. For off-the-grid applications where high power factor (PF) is required, discontinuous conduction mode (DCM) is an easy way to achieve a unity power factor (PF) with flyback converters, buck-boost converters, single-ended primary-inductor converters (SEPICs), and other up-down converters. However, operating in a discontinuous conduction mode (DCM) increases the root mean square (RMS) values of currents in a converter, which results in an increase of conduction power loss. In order to limit the increase of conduction loss due to operation in a discontinuous conduction mode (DCM), the dead time when neither the power converter switching element Q_PC nor the power converter diode D_PC are conducting should be minimized. With a dead time of zero, operation in a critical or boundary conduction mode (BCM) provides an advantage of lower conduction loss when compared to a discontinuous conduction mode (DCM). However, switching losses in boundary conduction modes (BCM) are higher than those in discontinuous conduction modes (DCM) due to higher switching frequencies.
In an effort to mitigate the interference and excessive switching losses discussed above with respect to the conventional driver circuitry 10 in FIG. 1, minimum off-time circuitry 32 has been used along with conventional driver circuitry 10, as discussed in copending U.S. patent application Ser. No. 14/071,733 and shown in FIG. 2. The minimum off-time circuitry 32 is coupled between the switching control circuitry 18 and the auxiliary winding 30 of the power converter transformer T_PC, such that the minimum off-time circuitry 32 receives the switching indicator signal SW_I from the auxiliary winding 30 and the switching control signal SW_C from the switching control circuitry 18 and provides an off-time limited switching trigger signal SW_T to the switching control circuitry 18. Notably, the switching control circuitry 18 is generally a pre-made critical or boundary conduction mode switching controller such as the L656X series of switching controllers made by STMicroelectronics, Inc. of Geneva, Switzerland. Accordingly, the adjustability of the switching control circuitry 18 may be minimal, such that the switching control circuitry 18 is configured to turn ON the power converter switching element Q_PC whenever the current of the switching indicator signal SW_I normally provided to the switching control circuitry 18 drops below zero. Instead of directly providing the switching indicator signal SW_I to the switching control circuitry 18 in FIG. 2, the minimum off-time circuitry 32 alters the switching indicator signal SW_I with reference to the switching control signal SW_C to provide the off-time limited switching trigger signal SW_T, which effectively allows the switching indicator signal SW_I to drop below zero for some period of time before the switching control circuitry 18 switches the power converter switching element Q_PC back ON.
When the conduction time of the power converter diode D_PC is above a predetermined threshold such that interference and switching losses in the conventional power converter circuitry 10 are relatively low, the minimum off-time circuitry 32 may directly provide the switching indicator signal SW_I as the off-time limited switching trigger signal SW_T such that the conventional driver circuitry 10 operates in a critical or boundary conduction mode. However, when the conduction time of the power converter diode D_PC is above a predetermined threshold such that interference and switching losses may be problematic, the minimum off-time circuitry 32 may alter the switching indicator signal SW_I and provide the modified signal as the off-time limited switching trigger signal SW_T such that the conventional power converter circuitry 10 operates in a discontinuous conduction mode, wherein the off-time of the switching control signal SW_C and thus the power converter switching element Q_SW is contained at a minimum value. Accordingly, the conventional power converter circuitry 10 may advantageously operate in a combination of a boundary conduction mode (BCM) and a discontinuous conduction mode (DCM) through an AC line cycle, thereby providing an opportunity to optimize the performance of the system.
FIG. 3 shows details of the minimum off-time circuitry 32 discussed above. The minimum off-time circuitry 32 includes a minimum off-time diode D_MOT, a number of minimum off-time resistors R_MOT, a number of minimum off-time capacitors C_MOT, and a minimum off-time switching element Q_MOT. The minimum off-time diode D_MOT is coupled in series with a first minimum off-time resistor R_MOT1 between a first input node 34 of the minimum off-time circuitry 32 and a base contact (B) of the minimum off-time switching element Q_MOT. A second minimum off-time resistor R_MOT2 is coupled between the base contact (B) of the minimum off-time switching element Q_MOT and ground. A first minimum off-time capacitor C_MOT1 is coupled in parallel with the first minimum off-time resistor R_MOT between the minimum off-time diode D_MOT and the base contact (B) of the minimum off-time switching element Q_MOT. A second minimum off-time capacitor C_MOT2 is coupled in parallel with the second minimum off-time resistor R_MOT2 between the base contact (B) of the minimum off-time switching element Q_MOT and ground. A collector contact (C) of the minimum off-time switching element Q_MOT is coupled to a supply voltage VDD. An emitter contact (E) of the minimum off-time switching element Q_MOT is coupled to ground via a third minimum off-time resistor R_MOT3 and additionally coupled to an output node 38 of the minimum off-time circuitry 32. A fourth minimum off-time resistor R_MOT4 is coupled between a second input node 36 of the minimum off-time circuitry 32 and the emitter contact (E) of the minimum off-time switching element Q_MOT.
The operation of the minimum off-time circuitry 32 is now described with reference to FIG. 4, which illustrates waveforms of the various signals in the circuitry. The minimum off-time circuitry 32 receives the switching control signal SW_C at the first input node 34 and the switching indicator signal SW_I at the second input node 36. The RC network created by the first minimum off-time resistor R_MOT1, the second minimum off-time resistor R_MOT2, the first minimum off-time capacitor C_MOT1, and the second minimum off-time capacitor C_MOT2 results in a controlled decay of the switching control signal SW_C, which is presented as a decayed switching control signal SW_CD to the base contact (B) of the minimum off-time switching control element Q_MOT. As shown in FIG. 4, the switching control signal SW_C is a square wave signal, while the decayed switching control signal SW_CD includes a plateau corresponding with the ON time of the switching control signal SW_C followed by a ramping decline starting when the switching control signal SW_C transitions from high to low. When the switching control signal SW_C is high, the first minimum off-time capacitor C_MOT1 and the second minimum off-time capacitor C_MOT2 are charged, and the minimum off-time switching element Q_MOT is turned ON by the divided voltage across the first minimum off-time resistor R_MOT1 and the second minimum off-time resistor R_MOT2, thereby clamping the off-time limited switching trigger signal SW_T high by the base-to-emitter voltage of the minimum off time switching element Q_MOT induced by the decayed switching control signal SW_CD. Closing the power converter switching element Q_PC effectively shorts the primary winding 26 of the power converter transformer T_PC to ground, as shown by the sharp dip in the switching indicator signal SW_I at time t0. Magnetic flux then builds in the primary winding 26 of the power converter transformer T_PC, resulting in a small ramping increase in the switching indicator signal SW_I between time t0 and t1, which in turn increases the magnitude of the off-time limited switching trigger signal SW_T.
As the off-time limited switching trigger signal SW_T reaches a desired magnitude at time t1, the switching control circuitry 18 transitions the switching control signal SW_C from high to low. Although though the switching control signal SW_C is low at this point, the stored voltage in the first minimum off-time capacitor C_MOT1 and the second minimum off-time capacitor C_MOT2 begin to discharge into the base contact (B) of the minimum off-time switching element Q_MOT, thereby continuing to keep the device ON until the voltage supplied by the minimum off-time capacitors decays below the threshold voltage of the device. At some point during the off-time of the switching control signal SW_C and thus the power converter switching element Q_PC, the magnetic field of the primary winding 26 of the power converter transformer T_PC decays below a certain threshold, such that the power delivered to the secondary winding 28 and the auxiliary winding 30 as measured by the switching indicator signal SW_I drops significantly and begins to resonate, as shown starting at time t2. The switching period of the switching control signal SW_C due to the minimum off-time circuitry 32 is therefore described by Equation (1):
                              t          s                =                                            t              on                        +                          t              off                                =                                    t              on                        +                                          R                                  MOT                  ⁢                                                                          ⁢                  1                                            ⁢                              C                                  MOT                  ⁢                                                                          ⁢                  2                                            ⁢                              ln                ⁡                                  (                                                            V                                              B                        ⁢                                                                                                  ⁢                        0                                                                                    V                      BF                                                        )                                                                                        (        1        )            where tS is the switching period of the switching control signal SW_C, ton is the ON time of the switching control signal SW_C, toff is the OFF time of the switching control signal SW_C, VBO is the initial voltage of the decayed switching control signal SW_CD at the base contact (B) of the minimum off-time switching element Q_MOT when the switching control signal SW_C transitions from low to high, and VBF is the final voltage of the decayed switching control signal SW_CD just before the next transition of the switching control signal SW_C from low to high again at time t3.
The off-time limited switching trigger signal SW_T tracks the switching indicator signal SW_I, but further receives a scaled version of the decayed switching control signal SW_CD due to the base-to-emitter voltage of the minimum off-time switching element Q_MOT. The base-to-emitter voltage of the minimum off-time switching element Q_MOT therefore effectively clamps the switching trigger signal SW_T above a predetermined threshold, such that the switching trigger signal SW_T will not trigger the beginning of a new cycle in the switching control circuitry 18 until a desired amount of off-time has been achieved. The desired amount of off-time may be altered by setting the component values of the first minimum off-time resistor R_MOT1, the second minimum off-time resistor R_MOT2, the first minimum off-time capacitor C_MOT1, and the second minimum off-time capacitor C_MOT2, such that the decay rate of the decayed switching control signal SW_CD provides a desired response.
While the minimum off-time circuitry 32 discussed above reduces excessive interference and switching losses at high switching frequencies, interference and switching losses may still occur due to high frequency transitions in the ON period of the switching control signal SW_C. Further, the minimum off-time circuitry 32 discussed above may suffer from time mismatch and reliability issues due to a relatively large area in the switching cycle over which the minimum off-time circuitry 32 may cause the switching control circuitry 18 to begin a new cycle. The time mismatch and reliability issues may result in a shorter than desired off-time and a failure to provide the off-time limited switching trigger signal SW_T such that the power converter switching element Q_PC is switched ON during a resonant valley of the switching indicator signal SW_I and thus a zero or low current condition of the primary winding 26 of the power converter transformer T_PC in some situations. Failing to provide the off-time limited switching trigger signal SW_T such that the power converter switching element Q_PC is switched ON during a resonant valley of the switching indicator signal SW_I and thus a zero or low current condition of the primary winding 26 of the power converter transformer T_PC may result in excess switching losses that degrade the efficiency of the conventional power converter circuitry 10. Accordingly, there is a need for a switching control scheme that reliably provides further reductions in interference and switching losses at high frequencies.